Yuan Taur, Douglas A. Buchanan, et al.
Proceedings of the IEEE
We derive a new scale length for two-dimensional (2-D) effects in MOSFET's and discuss its significance. This derivation properly takes into account the difference in permittivity between the Si channel and the gate insulator, and thus permits an accurate understanding of the effects of the using insufficiently scaled oxide or thicker higher permittivity gate insulators. The theory shows that the utility of higher dielectric constant insulators decreases for ε/ε o>∼20, and that in no event should the insulator be thicker than the Si depletion depth. The approach is also applied to double-gated FET structures, resulting in a new more general scale length formula for them, too.
Yuan Taur, Douglas A. Buchanan, et al.
Proceedings of the IEEE
Brian L. Ji, Dale J. Pearson, et al.
IEEE Trans Semicond Manuf
Yuan Taur, Han-Ping Chen, et al.
IEEE T-ED
Barry P. Linder, James H. Stathis, et al.
IRPS 2003