Conference paper
Area and performance optimizations in path-based scheduling
Reinaldo A. Bergamaschi, Raul Camposano, et al.
European Conference on Design Automation 1992
In this tutorial, the author describes how high-level synthesis bridges the gap between behavioral specifications and hardware structure by automatically generating a circuit description from a netlist. The resulting description can be used for other design automation tools such as logic synthesis and layout. Describing high-level synthesis for synchronous digital hardware, the author explains the steps of the process, which include compilation, transformation, scheduling, and allocation. © 1990 IEEE
Reinaldo A. Bergamaschi, Raul Camposano, et al.
European Conference on Design Automation 1992
Raul Camposano, L.F. Saunders, et al.
IEEE Design and Test of Computers
Raul Camposano, Louise Trevillyan
ISCAS 1989
Raul Camposano, Arno Kunzmann
ICCD 1985