Conference paper
Learning Reduced Order Dynamics via Geometric Representations
Imran Nasim, Melanie Weber
SCML 2024
CNFETs were fabricated in a top gate construction. The thin dielectric offered improved electrical performance relative to substrate-gated CNFETs with thicker gate dielectrics, at a fraction of the gate voltage. The top gate structure also offered individual switchability, as well as stable n-FET and p-FET devices, enabling the possibility of future CMOS CNFET circuits.
Imran Nasim, Melanie Weber
SCML 2024
Lawrence Suchow, Norman R. Stemple
JES
Julian J. Hsieh
Journal of Vacuum Science and Technology A: Vacuum, Surfaces and Films
R. Ghez, J.S. Lew
Journal of Crystal Growth