Compressive Diffusion Break Stressor for Gate-All-Around Nanosheet pFET Transistor Performance Improvement

In this work, we have developed a compressive SiN (c-SiN) diffusion break (DB) dielectric stressor for gate-all-around nanosheet (GAA-NS) transistor to improve the pFET device and reduce intrinsic nFET/pFET performance offset in this technology. A significant amount of stress in short channel (SC) Si pFET devices is induced through DB gate replacement using compressive SiN (c-SiN) with customized treatment. We report an additional stress in SC NS pFET devices post channel release of ~700MPa induced by cSiN DB stressors, leading to a corresponding Ieff-Ioff performance benefit of 25% on pFET logic devices at scaled CPP with no degradation of the short channel effects and reliability. As expected, the improvement is greater as the devices are closer to the c-SiN DB stressor with a strong dependence on the active length.