Conference paperInvestigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substratesQiqing Ouyang, Min Yang, et al.VLSI Technology 2005
Conference paperChallenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyondH. Kawasaki, V.S. Basker, et al.IEDM 2009
Conference paperExtremely-scaled double-gate CMOS with non-self-aligned back gateKeunwoo Kim, Hussein I. Hanafi, et al.VLSI Technology 2005
Conference paperVDD scaling for FinFET logic and memory circuits: The impact of process variations and SRAM stabilityC.-H. Lin, K. Das, et al.VLSI-TSA 2006
