Channel Material and Inner Spacer Impact on Gate Stack TDDB of Gate-All-Around Nanosheet Transistors

In this paper, we present a detailed study of Time dependent dielectric breakdown (TDDB) reliability on N- and P-type stacked Gate-All -Around (GAA) Nanosheet (NS) transistors with (w/) Si channel and SiGe channel without(w/o) Inner Spacer (IS), then compared with Si channel GAA NS transistors w/ IS. Our results show robust TDDB reliability across all Design of Experiments (DOEs), with P-type transistors having a narrower TDDB margin compared to N-type transistors.