Advanced pixel-level data-line multiplexing for low-cost/high-resolution AMLCDs

Pixel-Level Data-Line Multiplexing reduces the number of data-lines and driver-chips required for AMLCDs with a-Si technology. The technical feasibility of the method has already been demonstrated with application prototype on 15-inch SXGA+(1400×1050) AMLCD recently. This paper proposes an advanced driving technique for improving characteristics of the multiplexed AMLCDs with three-level gate-line voltages.