High transconductance 0.1 μ m pMOSFET
Y. Taur, S. Cohen, et al.
IEDM 1992
A 3.5 ns ECL-compatible 64Kb liquid-nitrogen CMOS (LN-CMOS) SRAM technology with 2.5V power-supply voltage is described. Key features of this high performance 0.5μm-channel LN-CMOS SRAM technology optimized for 77K operation include 0.6,μm optical lithography for the gate level, dual polysilicon work functions, retrograde n-well, low resistance arsenic and boron source/drain diffusions, self-aligned titanium silicide, and two-level metal interconnects. For the first time, the leverage of liquid nitrogen CMOS with 2.3X chip level performance improvement at 77K over room temperature CMOS is demonstrated.
Y. Taur, S. Cohen, et al.
IEDM 1992
J.H. Comfort, G.L. Patton, et al.
IEDM 1990
Y. Taur, S.J. Wind, et al.
IEDM 1993
J.Y.-C. Sun, M. Arienzo, et al.
ESSDERC 1987