Paper
Nanoscale CMOS
Hon-Sum Philip Wong, David J. Frank, et al.
Proceedings of the IEEE
A phenomenological circuit model for the quiteron, a three-layer superconducting amplifying device, has been developed which simulates the observed I-V curves reasonably well. The model is used to analyze the behavior of the quiteron for various circuits and a range of parameters. The results show that the quiteron has poor isolation making it difficult to use in logic circuits. Several ways to somewhat reduce this problem are suggested.
Hon-Sum Philip Wong, David J. Frank, et al.
Proceedings of the IEEE
Madhu Padmanabha Sumangala, Ahish Shylendra, et al.
IEEE Electron Device Letters
Ramachandran Muralidhar, Jin Cai, et al.
IEEE T-ED
Sandip Tiwari, David J. Frank, et al.
IEEE T-ED