Nelson Felix

Title

Director, Technical Business Development - IBM Semiconductors

Publications

DSA via hole shrink for advanced node applications
- - Cheng Chi
  - Chi Chun Liu
  - et al.
- 2016
- SPIE Advanced Lithography 2016
Strategies to enable directed self-Assembly contact hole shrink for tight pitches
- - Kristin Schmidt
  - Hitoshi Osaki
  - et al.
- 2016
- SPIE Advanced Lithography 2016
Advanced in-line metrology strategy for self-aligned quadruple patterning
- - Robin Chao
  - Mary Breton
  - et al.
- 2016
- SPIE Advanced Lithography 2016
Through-pellicle defect inspection of EUV masks using an ArF-based inspection tool
- - Dario Goldfarb
  - William Broadbent
  - et al.
- 2016
- SPIE Advanced Lithography 2016
Comparison of left and right side line edge roughness in lithography
- - Lei Sun
  - Nicole Saulnier
  - et al.
- 2016
- SPIE Advanced Lithography 2016
EUV patterning successes and frontiers
- - Nelson Felix
  - Daniel Corliss
  - et al.
- 2016
- SPIE Advanced Lithography 2016
Advanced in-line optical metrology of sub-10nm structures for gate all around devices (GAA)
- - R. Muthinti
  - Nicolas Loubet
  - et al.
- 2016
- SPIE Advanced Lithography 2016
Assessments of image-based and scatterometry-based overlay targets
- - Chiew-Seng Koay
  - Nelson Felix
  - et al.
- 2016
- SPIE Advanced Lithography 2016
EUV processing and characterization for BEOL
- - Nicole Saulnier
  - Yongan Xu
  - et al.
- 2015
- SPIE Advanced Lithography 2015
Towards production ready processing with a state-of-the-art EUV cluster
- - Karen Petrillo
  - Nicole Saulnier
  - et al.
- 2015
- SPIE Advanced Lithography 2015

Visit Google Scholar

Patents

- 13 Sep 2021
- US
- 11121024
Tunable Hardmask For Overlayer Metrology Contrast
- 09 Aug 2021
- US
- 11084032
Method To Create Multilayer Microfluidic Chips Using Spin-on Carbon As Gap Fill And Spin-on Glass Tone Inversion
- 19 Jul 2021
- US
- 11067896
Dynamic Adjustment Of Post Exposure Bake During Lithography Utilizing Real-time Feedback For Wafer Exposure Delay
- 05 Jul 2021
- US
- 11054250
Multi-channel Overlay Metrology
- 14 Jun 2021
- US
- 11037786
Patterning Material Film Stack With Metal-containing Top Coat For Enhanced Sensitivity In Extreme Ultraviolet (euv) Lithography
- 03 May 2021
- US
- 10998192
Sequential Infiltration Synthesis Extreme Ultraviolet Single Expose Patterning
- 15 Mar 2021
- US
- 10950440
Patterning Directly On An Amorphous Silicon Hardmask
- 15 Dec 2020
- GB
- 2580279
Patterning Directly On An Amorphous Silicon Hardmask
- 09 Nov 2020
- US
- 10831102
Photoactive Polymer Brush Materials And Euv Patterning Using The Same
- 07 Sep 2020
- US
- 10768532
Co-optimization Of Lithographic And Etching Processes With Complementary Post Exposure Bake By Laser Annealing

Blog posts

IBM and Albany partners unlock new yield benchmarks for EUV patterning
Technical note
Luciana Meli and Nelson Felix
24 Oct 2024
- Semiconductors
EUV patterning yield breakthrough sets new benchmark for logic scaling
Technical note
Nelson Felix and Luciana Meli
06 Nov 2020
4 minute read
IBM Research at SPIE 2020: New architectures and fabrications for AI hardware
Research
Nelson Felix
21 Feb 2020
4 minute read
- AI Hardware
- Semiconductors

Top collaborators

Luciana Meli

Senior Manager: Patterning & Metrology

Nicolas Loubet

STSM, Advanced Logic Technology Research

Mary Breton

Technical Assistant to Huiming Bu | Semiconductor Enablement Program Management & Infrastructure

Huiming Bu

Vice President: IBM Semiconductors Global R&D and Albany Operations