Phase Change Memory-based Hardware Accelerators for Deep Neural NetworksGeoffrey BurrPritish Narayananet al.2023VLSI Technology 2023Invited talk
Architectures and Circuits for Analog-memory-based Hardware Accelerators for Deep Neural NetworksSidney TsaiPritish Narayananet al.2023ISCAS 2023Invited talk
Analog In-Memory Computing for Deep Neural Network AccelerationAndrea FasoliGeoffrey Burret al.2023MRS Spring Meeting 2023Talk
Analog-AI: Hardware Acceleration for Deep Neural Network InferenceGeoffrey BurrSidney Tsaiet al.2023NeuMatDeCaS 2023Invited talk
Impact of PCM noise on the Spiking Restricted Boltzmann Machine via On-Chip Trainable PCM synapsesUicheol ShinMasatoshi Ishiiet al.2022MRS Fall Meeting 2022Talk
Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including TransformersAtsuya OkazakiPritish Narayananet al.2022ISCAS 2022Conference paper
Fully On-Chip MAC at 14 nm Enabled by Accurate Row-Wise Programming of PCM-Based Weights and Parallel Vector-Transport in Duration-FormatPritish NarayananStefano Ambrogioet al.2021IEEE T-EDPaper
Fully on-chip MAC at 14nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-formatP. NarayananS. Ambrogioet al.2021VLSI 2021Conference paper
On-Chip Trainable 1.4M 6T2R PCM Synaptic Array with 1.6K Stochastic LIF Neurons for Spiking RBMMasatoshi IshiiU. Shinet al.2019IEDM 2019Conference paper
Analysis of Effect of Weight Variation on SNN Chip with PCM-Refresh MethodA. NomuraM. Itoet al.2019Neural Processing LettersPaper
29 Sep 2025CNZL201980065342.2Linearly Weight Updatable Cmos Synaptic Array Without Cell Location Dependence