Publications

8 results at ISQED 2005

Combining system level modeling with assertion based verification
- - Anat Dahan
  - Daniel Geist
  - et al.
- 2005
- ISQED 2005
Exact algorithms for coupling capacitance minimization by adding one metal layer
- - Xiang Hua
  - Kai-Yuan Chao
  - et al.
- 2005
- ISQED 2005
Wire planning with bounded over-the-block wires
- - Hua Xiang
  - I-Min Liu
  - et al.
- 2005
- ISQED 2005
Modeling and analysis of gate leakage in ultra-thin oxide sub-50nm double gate devices and circuits
- - Saibal Mukhopadhyay
  - Keunwoo Kim
  - et al.
- 2005
- ISQED 2005
Reducing power consumption during TLB lookups in a PowerPC/spl trade/ embedded processor
- - Shivakumar Swaminathan
  - Sanjay B. Patel
  - et al.
- 2005
- ISQED 2005
A more effective C/sub EFF/
- - Sani R. Nassif
  - Zhuo Li
- 2005
- ISQED 2005
Controlled-load limited switch dynamic logic circuit
- - Jayakumaran Sivagnaname
  - Hung C. Ngo
  - et al.
- 2005
- ISQED 2005
A mask reuse methodology for reducing system-on-a-chip cost
- - Subhrajit Bhattacharya
  - John Darringer
  - et al.
- 2005
- ISQED 2005