(110) Channel, SiON gate-dielectric PMOS with record high Ion=1 mA/μm through channel stress and source drain external resistance (R ext) engineering
- B. Yang
- A. Waite
- et al.
- 2007
- IEDM 2007
Conference paper
Publications
9 results at IEDM 2007
High performance CMOS variability in the 65nm regime and beyond
- Sani Nassif
- Kerry Bernstein
- et al.
- 2007
- IEDM 2007
Conference paperMeasurements of inter-and-intra device transient thermal transport on SOI FETs
- P. Solomon
- M. Shamsa
- et al.
- 2007
- IEDM 2007
Conference paperTechnology elements of a common platform bulk foundry offering (invited)
- P. Gilbert
- A. Steegen
- et al.
- 2007
- IEDM 2007
Conference paperExciton generation in suspended carbon nanotube FETs: A computational study
- Siyuranga O. Koswatta
- Vasili Perebeinos
- et al.
- 2007
- IEDM 2007
Conference paperExtendibility of NiPt silicide contacts for CMOS technology demonstrated to the 22-nm node
- Kazuya Ohuchi
- Christian Lavoie
- et al.
- 2007
- IEDM 2007
Conference paperWrite strategies for 2 and 4-bit multi-level phase-change memory
- T. Nirschl
- J.B. Philipp
- et al.
- 2007
- IEDM 2007
Conference paperTechnology circuit co-design for high performance logic
- Kerry Bernstein
- Norman J. Rohrer
- 2007
- IEDM 2007
Conference paperUltra-low leakage silicon-on-insulator technology for 65 nm node and beyond
- Jin Cai
- Amlan Majumdar
- et al.
- 2007
- IEDM 2007
Conference paper