Resonant clocking using distributed parasitic capacitanceAlan J. DrakeKevin J. Nowkaet al.2003CICC 2003
A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loopWoogeun RheeHerschel Ainspanet al.2003CICC 2003
Three dimensional CMOS devices and integrated circuitsMeikei IeongKathryn W. Guariniet al.2003CICC 2003