Developing an architecture validation suite. Application to the PowerPC architectureLaurent FournierAnatoly Koyfmanet al.1999DAC 1999
Behavioral network graph unifying the domains of high-level and logic synthesisReinaldo A. Bergamaschi1999DAC 1999
Gradient-based optimization of custom circuits using a static-timing formulationA.R. ConnI.M. Elfadelet al.1999DAC 1999
Buffer insertion with accurate gate and interconnect delay computationCharles J. AlpertA. Devganet al.1999DAC 1999