Critical area computation for missing material defects in VLSI circuits
- E. Papadopoulou
- 2001
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Publications
141 results at IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Interconnect synthesis without wire tapering
- Charles J. Alpert
- Anirudh Devgan
- et al.
- 2001
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Timed circuit verification using TEL structures
- Wendy Belluomini
- Chris J. Myers
- et al.
- 2001
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Noise considerations in circuit optimization
- Chandu Visweswariah
- Ruud A. Haring
- et al.
- 2000
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Timed state space exploration using POSET's
- Wendy Belluomini
- Chris J. Myers
- 2000
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
EDA in IBM: Past, present, and future
- John Darringer
- 2000
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Transient sensitivity computation in controlled explicit piecewise linear simulation
- Tuyen V. Nguyen
- Anirudh Devgan
- et al.
- 2000
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Curvilinear detailed routing with simultaneous wire-spreading and wire-fattening
- Toshiyuki Hama
- Hiroaki Etoh
- 1999
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Buffer insertion for noise and delay optimization
- Charles J. Alpert
- Anirudh Devgan
- 1999
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Critical area computation via voronoi diagrams
- Evanthia Papadopoulou
- D.T. Lee
- 1999
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems