VLSI Limitations from Drain-Induced Barrier Lowering
- Ronald R. Troutman
- 1979
- IEEE T-ED
Paper
Publications
465 results at IEEE T-ED
Electron-Beam Resist Edge Profile Simulation
- David F. Kyser
- Chiu H. Ting
- 1979
- IEEE T-ED
Paper1 μm MOSFET VLSI Technology: Part V—A Single-Level Polysilicon Technology Using Electron-Beam Lithography
- William R. Hunter
- Linda Ephrath
- et al.
- 1979
- IEEE T-ED
PaperSpatial Distribution of Wall Charge Density in AC Plasma Display Panels
- Omesh Sahni
- W.P. Jones
- 1979
- IEEE T-ED
Paper1 µm MOSFET VLSI Technology: Part 11—Device Designs and Characteristics for High-Performance Logic Applications
- Robert H. Dennard
- Fritz H. Gaensslen
- et al.
- 1979
- IEEE T-ED
PaperHot-Electron Emission in N-Channel IGFET's
- Tak H. Ning
- Ronald R. Troutman
- 1979
- IEEE T-ED
PaperWA-B1 Domain Electroluminescence in ac Thin-Film Devices
- H. Rüfer
- V. Marrello
- et al.
- 1979
- IEEE T-ED
Paper1 µm MOSFET VLSI Technology: Part VII—Metal Silicide Interconnection Technology—A Future Perspective
- Billy L. Crowder
- Stanley Zirinsky
- 1979
- IEEE T-ED
PaperMA-4 the Evolution of MOS Technology Toward VLSI
- R.H. Dennard
- 1979
- IEEE T-ED
PaperWA-A4 Characteristics of the Currents in p-n-p Bipolar Transistors with Degenerate Base Region
- D.D. Tang
- 1979
- IEEE T-ED
Paper