Successful dual damascene integration of extreme low k materials (k < 2.0) using a novel gap fill based integration scheme
- S.V. Nitta
- S. Purushothaman
- et al.
- 2004
- IEDM 2004
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14201 results for Physical Sciences
Simulation study of Ge n-channel 7.5 nm DGFETs of arbitrary crystallographic alignment
- S.E. Laux
- 2004
- IEDM 2004
Ultra-fast measurements of the inversion charge in MOSFETs and impact on measured mobility in high-k MOSFETs
- D. Singh
- P. Solomon
- et al.
- 2004
- IEDM 2004
Selectively formed high mobility strained Ge PMOSFETs for high performance CMOS
- Hulling Shang
- Jack O. Chu
- et al.
- 2004
- IEDM 2004
SiGe HBT technology with f max/f T = 350/300 GHz and gate delay below 3.3 ps
- M. Khater
- J.-S. Rieh
- et al.
- 2004
- IEDM 2004
Device Design Considerations for Ultra-Thin SOI MOSFETs
- B. Doris
- M. Ieong
- et al.
- 2003
- IEDM 2003
Simulation of quantum electronic transport in small devices: A Master equation approach
- M.V. Fischetti
- S.E. Laux
- et al.
- 2003
- IEDM 2003
Tunnel Current Measurements on P/N Junction Diodes and Implications for Future Device Design
- Paul M. Solomon
- David J. Frank
- et al.
- 2003
- IEDM 2003
Critical Assessment of Soft Breakdown Stability Time and the Implementation of New Post-Breakdown Methodology for ultra-thin gate oxides
- E. Wu
- J. Suñé
- et al.
- 2003
- IEDM 2003
Low voltage, scalable nanocrystal FLASH memory fabricated by templated self assembly
- K.W. Guarini
- C.T. Black
- et al.
- 2003
- IEDM 2003