Design of high performance PFETs with strained Si channel and laser anneal
- Z. Luo
- Y.F. Chong
- et al.
- 2005
- IEDM 2005
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14201 results for Physical Sciences
65nm CMOS technology for low power applications
- A. Steegen
- R. Mo
- et al.
- 2005
- IEDM 2005
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- W.-H. Lee
- A. Waite
- et al.
- 2005
- IEDM 2005
Fluctuation limits & scaling opportunities for CMOS SRAM cells
- Azeez Bhavnagarwala
- Stephen Kosonocky
- et al.
- 2005
- IEDM 2005
Thermal oxidation of Cu interconnects capped with CoWP
- J.P. Gambino
- S. Smith
- et al.
- 2005
- MRS Spring Meeting 2005
Strain relaxation in Si1-xGex thin films on Si (100) substrates: Modeling and comparisons with experiments
- Kedarnath Kolluri
- Luis A. Zepeda-Ruiz
- et al.
- 2005
- MRS Spring Meeting 2005
Application of nanoindentation to characterize fracture in ILD films used in the BEOL
- Eva E. Simonyi
- E. Liniger
- et al.
- 2005
- MRS Spring Meeting 2005
Interface engineering for enhanced electron mobilities in W/HfO 2 gate stacks
- A.C. Callegari
- P. Jamison
- et al.
- 2004
- IEDM 2004
Dual stress liner for high performance sub-45nm gate length SOI CMOS manufacturing
- H.S. Yang
- R. Malik
- et al.
- 2004
- IEDM 2004
Advanced gate stacks with fully silicided (FUSI) gates and high-κ dielectrics: Enhanced performance at reduced gate leakage
- E. Gusev
- C. Cabral Jr.
- et al.
- 2004
- IEDM 2004