High performance gate first HfSiON dielectric satisfying 45nm node requirements
- M.A. Quevedo-Lopez
- S. Krishnan
- et al.
- 2005
- IEDM 2005
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14201 results for Physical Sciences
Integration and optimization of embedded-SiGe, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
- M. Horstmann
- A. Wei
- et al.
- 2005
- IEDM 2005
Stress memorization in high-performance FDSOI devices with ultra-thin silicon channels and 25nm gate lengths
- D. Singh
- J. Sleight
- et al.
- 2005
- IEDM 2005
SOI 90-nm ring oscillator sub-ps model-hardware correlation and parasitic-aware optimization leading to 1.94-ps switching delay
- Jean-Olivier Plouchart
- Jonghae Kim
- et al.
- 2005
- IEDM 2005
From DRAM to SRAM with a novel SiGe-based negative differential resistance (NDR) device
- Liang Yue
- Kailash Gopalakrishnan
- et al.
- 2005
- IEDM 2005
An integrated methodology for accurate extraction of S/D series resistance components in nanoscale MOSFETs
- Seong-Dong Kim
- Shreesh Narasimha
- et al.
- 2005
- IEDM 2005
Selective epitaxial channel ground plane thin SOI CMOS devices
- Zhibin Ren
- M. Ieong
- et al.
- 2005
- IEDM 2005
Enabling SOI-based assembly technology for three-dimensional (3D) integrated circuits (ICs)
- A. Topol
- D.C. La Tulipe
- et al.
- 2005
- IEDM 2005
Performance and limitations of 65 nm CMOS for integrated RF power applications
- Jörg Scholvin
- David R. Greenberg
- et al.
- 2005
- IEDM 2005
Carbon nanotube interconnects: Implications for performance, power dissipation and thermal management
- Navin Srivastava
- Rajiv V. Joshi
- et al.
- 2005
- IEDM 2005