A Subnanosecond Josephson Tunneling Memory Cell with Nondestructive Readout
- Hans H. Zappe
- 1975
- IEEE JSSC
Publications
120 results at IEEE JSSC
Special Correspondence Effect of Randomness in the Distribution of Impurity Ions on FET Thresholds in Integrated Electronics
- Robert W. Keyes
- 1975
- IEEE JSSC
An Experimental Multiplier Circuit Based on Superconducting Josephson Devices
- Dennis J. Herrell
- 1975
- IEEE JSSC
High Performance MOS Integrated Circuit Using the Ion Implantation Technique
- Frank F. Fang
- Hans S. Rupprecht
- 1975
- IEEE JSSC
Capacitance Models for Integrated Circuit Metallization Wires
- Albert E. Ruehli
- Pierce A. Brennan
- 1975
- IEEE JSSC
Subthreshold Design Considerations for Insulated Gate Field-Effect Transistors
- Ronald R. Troutman
- 1974
- IEEE JSSC
Design of Ion-Implanted MOSFET's With Very Small Physical Dimensions
- Robert H. Dennard
- Fritz H. Gaensslen
- et al.
- 1974
- IEEE JSSC
Femtojoule Josephson Tunneling Logic Gates
- Dennis J. Herrell
- 1974
- IEEE JSSC
A High Output Resistance Current Source
- Richard C. Jaeger
- 1974
- IEEE JSSC
Comparison of Mosfet Logic Circuits
- Peter W. Cook
- Dale L. Critchlow
- et al.
- 1973
- IEEE JSSC