Publications

12 results for Jun Yuan

A 45nm low cost low power platform by using integrated dual-stress-liner technology
- - J. Yuan
  - S.S. Tan
  - et al.
- 2006
- VLSI Technology 2006
Process induced stress for CMOS performance improvement
- - S. Fang
  - S.S. Tan
  - et al.
- 2006
- ICSICT 2006