Three-dimensional integrated circuits
- Anna W. Topol
- Douglas C. La Tulipe Jr.
- et al.
- 2006
- IBM J. Res. Dev
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22 results for K. Bernstein
Ultralow-voltage minimum-energy CMOS
- Scott Hanson
- Bo Zhai
- et al.
- 2006
- IBM J. Res. Dev
Analysis and design of digital CMOS circuits in hybrid SOI-epitaxial technology with different crystal orientations
- Koushik K. Das
- Shih-Hsien Lo
- et al.
- 2004
- IEEE International SOI Conference 2004
On the integration of CMOS with hybrid crystal orientations
- M. Yang
- V. Chan
- et al.
- 2004
- VLSI Technology 2004
Turning silicon on its edge
- Edward J. Nowak
- Ingo Aller
- et al.
- 2004
- IEEE Circuits and Devices Magazine
Scaling planar silicon devices
- Ching-Te Chuang
- Kerry Bernstein
- et al.
- 2004
- IEEE Circuits and Devices Magazine
Three dimensional CMOS devices and integrated circuits
- Meikei Ieong
- Kathryn W. Guarini
- et al.
- 2003
- CICC 2003
Design and CAD Challenges in sub-90nm CMOS Technologies
- Kerry Bernstein
- Ching-Te Chuang
- et al.
- 2003
- ICCAD 2003
The impact of gate-oxide breakdown SRAM stability
- R. Rodríguez
- J.H. Stathis
- et al.
- 2002
- IEEE Electron Device Letters
Soft error rate scaling for emerging SOI technology options
- P. Oldiges
- K. Bernstein
- et al.
- 2002
- VLSI Technology 2002