Complete and effective robustness checking by means of interpolation
- Stefan Frehse
- Gorschwin Fey
- et al.
- 2012
- FMCAD 2012
Conference paper
Publications
6 results for Karen Yorav
SAT-based synthesis of clock gating functions using 3-valued abstraction
- Eli Arbel
- Oleg Rokhlenko
- et al.
- 2009
- FMCAD 2009
Conference paperScalable conditional equivalence checking: An automated invariant-generation based approach
- Jason Baumgartner
- Hari Mony
- et al.
- 2009
- FMCAD 2009
Conference paperFunctional verification of power gated designs by compositional reasoning
- Cindy Eisner
- Amir Nahir
- et al.
- 2009
- Formal Methods in System Design
PaperOn-the-fly resolve trace minimization
- Ohad Shacham
- Karen Yorav
- 2007
- DAC 2007
Conference paperAdaptive application of SAT solving techniques
- Ohad Shacham
- Karen Yorav
- 2005
- CAV 2005
Workshop paper