Publications

24 results for D. Fried

High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- - W.-H. Lee
  - A. Waite
  - et al.
- 2005
- IEDM 2005
Stable SRAM cell design for the 32 nm node and beyond
- - Leland Chang
  - David M. Fried
  - et al.
- 2005
- VLSI Technology 2005
Investigation of CMOS devices with embedded SiGe source/drain on hybrid orientation substrates
- - Qiqing Ouyang
  - Min Yang
  - et al.
- 2005
- VLSI Technology 2005
Dual stress liner enhancement in hybrid orientation technology
- - C. Sheraw
  - M. Yang
  - et al.
- 2005
- VLSI Technology 2005
Looking into the crystal ball: Future device learning using hybrid E-beam and optical lithography
- - S.E. Steen
  - S.J. McNab
  - et al.
- 2005
- Microlithography 2005
Aggressively scaled (0.143 μm ²) 6T-SRAM cell for the 32 nm node and beyond
- - D. Fried
  - J. Hergenrother
  - et al.
- 2004
- IEDM 2004
A Simplified Hybrid Orientation Technology (SHOT) for high performance CMOS
- - B. Doris
  - Y. Zhang
  - et al.
- 2004
- VLSI Technology 2004
On the integration of CMOS with hybrid crystal orientations
- - M. Yang
  - V. Chan
  - et al.
- 2004
- VLSI Technology 2004
Scaling beyond the 65 nm node with FinFET-DGCMOS
- - E. Nowak
  - T. Ludwig
  - et al.
- 2003
- CICC 2003
A Fin-type independent-double-gate NFET
- - D. Fried
  - E. Nowak
  - et al.
- 2003
- Device Research Conference 2003