Voltage ramp stress based stress-and-sense test method for reliability characterization of Hf-base high-k/metal gate stacks for CMOS technologies
- E. Cartier
- Andreas Kerber
- et al.
- 2011
- ECS Meeting 2011
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182 results for Eduard Cartier
Full metal gate with borderless contact for 14 nm and beyond
- Soon-Cheon Seo
- L.F. Edge
- et al.
- 2011
- VLSI Technology 2011
Fast characterization of the Static Noise Margin degradation of cross-coupled inverters and correlation to BTI instabilities in MG/HK devices
- Andreas Kerber
- N. Pimparkar
- et al.
- 2011
- IRPS 2011
PBTI under dynamic stress: From a single defect point of view
- K. Zhao
- J.H. Stathis
- et al.
- 2011
- IRPS 2011
Analysis of recoverable and non-recoverable NBTI and PBTI using AC and DC stresses
- Frederic Monsieur
- Eduard Cartier
- et al.
- 2011
- IRPS 2011
A robust reliability methodology for accurately predicting Bias Temperature Instability induced circuit performance degradation in HKMG CMOS
- D.P. Ioannou
- K. Zhao
- et al.
- 2011
- IRPS 2011
PBTI relaxation dynamics after ac VS. DC stress in high-K/metal gate stacks
- K. Zhao
- J.H. Stathis
- et al.
- 2010
- IRPS 2010
Impact of charge trapping on the voltage acceleration of TDDB in metal gate/high-k n-channel MOSFETs
- A. Kerber
- A. Vayshenker
- et al.
- 2010
- IRPS 2010
PBTI response to interfacial layer thickness variation in Hf-based HKMG nFETs
- D.P. Ioannou
- E. Cartier
- et al.
- 2010
- IRPS 2010
Gate-all-around silicon nanowire 25-stage CMOS ring oscillators with diameter down to 3 nm
- Sarunya Bangsaruntip
- A. Majumdar
- et al.
- 2010
- VLSI Technology 2010