SiGe MODFETS: Overview and issues for sub-100 nm gate-length scaling
- S.J. Koester
- K.L. Saenger
- et al.
- 2004
- ECS Meeting 2004
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100 results for Steven J. Koester
Outlook and opportunities for hetero-epitaxy in SI CMOS technology and beyond
- S.J. Koester
- 2004
- ECS Meeting 2004
High speed, lateral PIN photodiodes in silicon technologies
- Jeremy D. Schaub
- Steven J. Koester
- et al.
- 2004
- SPIE IOPTO 2004
High-performance SiGe MODFET technology
- S.J. Koester
- J.O. Chu
- et al.
- 2004
- MRS Proceedings 2004
Implications of gate design on RF performance of sub-100 nm strained-Si/SiGe nMODFETs
- Q. Ouyang
- S.J. Koester
- et al.
- 2003
- SISPAD 2003
Strained Si CMOS (SS CMOS) technology: Opportunities and challenges
- K. Rim
- R. Anderson
- et al.
- 2003
- Solid-State Electronics
A comprehensive simulation study of strained-Si/SiGe nMODFET scaling for RF applications
- Qiqing Christine Ouyang
- S.J. Koester
- et al.
- 2002
- SISPAD 2002
Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs
- K. Rim
- J.O. Chu
- et al.
- 2002
- VLSI Technology 2002
Thermal stability of strained Si on relaxed Si1-xGex buffer layers
- P.M. Mooney
- S.J. Koester
- et al.
- 2001
- MRS Proceedings 2001
Strained Si NMOSFETs for high performance CMOS technology
- K. Rim
- S.J. Koester
- et al.
- 2001
- VLSI Technology 2001