Publications

20 results for D.W. Plass

Design of sub-90 nm low-power and variation tolerant PD/SOI SRAM cell based on dynamic stability metrics
- - Rajiv V. Joshi
  - Saibal Mukhopadhyay
  - et al.
- 2009
- IEEE Journal of Solid-State Circuits
An on-chip dual supply charge pump system for 45nm PD SOI eDRAM
- - J.B. Kuang
  - A. Mathews
  - et al.
- 2008
- ESSCIRC 2008
Design of the Power6™ microprocessor
- - Joshua Friedrich
  - Bradley McCredie
  - et al.
- 2007
- ISSCC 2007
A low power and high performance SOI SRAM circuit design with improved cell stability
- - R.V. Joshi
  - Y. Chan
  - et al.
- 2006
- IEEE SOI 2006
Statistical exploration of the dual supply voltage space of a 65nm PD/SOI CMOS SRAM cell
- - Rajiv Joshi
  - Rouwaida Kanj
  - et al.
- 2006
- ESSDERC 2006
Variability analysis for sub-100 nm PD/SOI CMOS SRAM cell
- - Rajiv V. Joshi
  - Saibal Mukhopadhyay
  - et al.
- 2004
- ESSCIRC 2004
Design and implementation of the POWER5™ microprocessor
- - Joachim Clabes
  - Joshua Friedrich
  - et al.
- 2004
- DAC 2004
Design and implementation of the POWER5™ microprocessor
- - Joachim Clabes
  - Joshua Friedrich
  - et al.
- 2004
- ICICDT 2004
Design and implementation of the POWERS™ microprocessor
- - Joachim Clabes
  - Joshua Friedrich
  - et al.
- 2003
- ISSCC 2003
Design and implementation of the POWER5™ microprocessor
- - Joachim Clabes
  - Joshua Friedrich
  - et al.
- 2003
- ISSCC 2003