Publications

10 results for Alan J. Drake

Design Considerations for Reconfigurable Delay Circuit to Emulate System Critical Paths
- - Xiaobin Yuan
  - Pawel Owczarczyk
  - et al.
- 2015
- IEEE Transactions on VLSI Systems
Optimization and modeling of resonant clocking inductors for the POWER8^TM microprocessor
- - Robert Groves
  - Phillip Restle
  - et al.
- 2014
- CICC 2014
Wide-frequency-range resonant clock with on-the-fly mode changing for the POWER8^TM microprocessor
- - Phillip Restle
  - David Shan
  - et al.
- 2014
- ISSCC 2014
Single-cycle, pulse-shaped critical path monitor in the POWER7+ microprocessor
- - Alan J. Drake
  - Michael S. Floyd
  - et al.
- 2013
- ISLPED 2013
Dynamic measurement of critical-path timing
- - Alan J. Drake
  - Robert M. Senger
  - et al.
- 2008
- ICICDT 2008
The design and implementation of a low-overhead supply-gated SRAM
- - J.B. Kuang
  - Hung Ngo
  - et al.
- 2006
- ESSCIRC 2006
4.0GHz 0.18.μm CMOS PLL based on an interpolative oscillator
- - Fadi H. Gebara
  - Jeremy D. Schaub
  - et al.
- 2005
- VLSI Circuits 2005
Resonant clocking using distributed parasitic capacitance
- - Alan J. Drake
  - Kevin J. Nowka
  - et al.
- 2004
- IEEE Journal of Solid-State Circuits
Resonant clocking using distributed parasitic capacitance
- - Alan J. Drake
  - Kevin J. Nowka
  - et al.
- 2003
- CICC 2003
Analysis of the Impact of Gate-Body Signal Phase on DTMOS Inverters in 0.13μm PD-SOI
- - Alan J. Drake
  - Noah Zamdmer
  - et al.
- 2003
- IEEE International SOI Conference 2003