Rigorous extraction of process variations for 65-nm CMOS design
- Wei Zhao
- Frank Liu
- et al.
- 2009
- IEEE Trans Semicond Manuf
Paper
Publications
31 results for Kanak Agarwal
A 5.3GHz 8T-SRAM with operation down to 0.41V in 65nm CMOS
- Leland Chang
- Yutaka Nakamura
- et al.
- 2007
- VLSI Circuits 2007
Conference paperParametric yield analysis and optimization in leakage dominated technologies
- Kanak Agarwal
- Rahul Rao
- et al.
- 2007
- IEEE Transactions on VLSI Systems
PaperMethods for estimating decoupling capacitance of non-switching circuit blocks
- Sani R. Nassif
- Kanak Agarwal
- et al.
- 2006
- ISCAS 2006
Conference paperCharacterization of total chip leakage using inverse (reciprocal) gamma distribution
- Emrah Acar
- Kanak Agarwal
- et al.
- 2006
- ISCAS 2006
Conference paperPower gating with multiple sleep modes
- Kanak Agarwal
- Harmander Deogun
- et al.
- 2006
- ISQED 2006
Conference paperA test structure for characterizing local device mismatches
- Kanak Agarwal
- Frank Liu
- et al.
- 2006
- VLSI Circuits 2006
Conference paperStatistical analysis of SRAM cell stability
- Kanak Agarwal
- Sani Nassif
- 2006
- DAC 2006
Conference paperStatistical interconnect metrics for physical-design optimization
- Kanak Agarwal
- Mridul Agarwal
- et al.
- 2006
- IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
PaperAchieving continuous VT performance in a dual VT process
- Kanak Agarwal
- Dennis Sylvester
- et al.
- 2005
- ASP-DAC 2005
Conference paper