Precise CD-SEM metrology of resist patterns at around 20 nm for 0.33NA EUV lithographyNobuhiro OkaiErin Lavigneet al.2014SPIE Advanced Lithography 2014
Gate length scaling and high drive currents enabled for high performance SOI technology using high-κ/metal gateK. HensonH. Buet al.2008IEDM 2008
A SiCOH BEOL interconnect technology for high density and high performance 65 nm CMOS applicationsMatthew AngyalJason Gillet al.2005AMC 2005
First microprocessors with immersion lithographyD. GilT. Baileyet al.2005SPIE Advanced Lithography 2005