Characterization of inversion-layer capacitance of electrons in high-k/metal gate stacks
- Ryosuke Iijima
- Lisa F. Edge
- et al.
- 2010
- IEEE T-ED
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37 results for L.F. Edge
Challenges and opportunities of extremely thin SOI (ETSOI) CMOS technology for future low power and general purpose system-on-chip applications
- A. Khakifirooz
- Kangguo Cheng
- et al.
- 2010
- VLSI-TSA 2010
Ultra-thin-body and BOX (UTBB) Fully Depleted (FD) device integration for 22nm node and beyond
- Q. Liu
- A. Yagishita
- et al.
- 2010
- VLSI Technology 2010
A 0.063 μm2 FinFET SRAM cell demonstration with conventional lithography using a novel integration scheme with aggressively scaled fin and gate pitch
- Veeraraghvan S. Basker
- Theodorus E. Standaert
- et al.
- 2010
- VLSI Technology 2010
Determination of band offsets, chemical bonding, and microstructure of the (TbxSc1-x) 2 O3 /Si system
- I. Geppert
- M. Eizenberg
- et al.
- 2010
- Journal of Applied Physics
Challenges and solutions of extremely thin SOI (ETSOI) for CMOS scaling to 22nm node and beyond
- Kangguo Cheng
- Ali Khakifirooz
- et al.
- 2010
- CSTIC 2010
Optimizing band-edge high-κ/metal gate n-MOSFETs with ALD lanthanum oxide cap layers-oxidant and positioning effects
- Robert D. Clark
- H. Jagannathan
- et al.
- 2010
- ECS Transactions
Investigation of band gap, band alignment and bonding states of the (TbxSc1-x)2O3/ Si system
- I. Geppert
- M. Eizenberg
- et al.
- 2010
- ECS Transactions
Extremely thin SOI (ETSOI) CMOS with record low variability for low power system-on-chip applications
- K. Cheng
- A. Khakifirooz
- et al.
- 2009
- IEDM 2009
Extremely scaled gate-first high-k/metal gate stack with EOT of 0.55 nm using novel interfacial layer scavenging techniques for 22nm technology node and beyond
- K. Choi
- H. Jagannathan
- et al.
- 2009
- VLSI Technology 2009