Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- N. Loubet
- T.B. Hook
- et al.
- 2017
- VLSI Technology 2017
Conference paper
Publications
5 results for Y. Xu
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
- Ruilong Xie
- Pietro Montanini
- et al.
- 2016
- IEDM 2016
Conference paperBEOL process integration for the 7 nm technology node
- T. Standaert
- Genevieve Beique
- et al.
- 2016
- IITC/AMC 2016
Conference paperHigh performance 14nm SOI FinFET CMOS technology with 0.0174μm2 embedded DRAM and 15 levels of Cu metallization
- C.-H.C-H. Lin
- Brian Greene
- et al.
- 2014
- IEDM 2014
Conference paperAdvanced bilayer low-k dielectric cap for reliable high performance Cu-low k interconnects
- Griselda Bonilla
- Lawrence A. Clevenger
- et al.
- 2008
- ADMETA 2008
Conference paper