Tolerating soft errors in processor cores using CLEAR (cross-layer exploration for architecting resilience)
- Eric Cheng
- Shahrzad Mirkhani
- et al.
- 2018
- IEEE TCADIS
Paper
Publications
3 results for Klas Lilja
Low Energy Proton SEUs in 32-nm SOI SRAMs at Low Vdd
- Ken Rodbell
- Michael S. Gordon
- et al.
- 2017
- IEEE TNS
PaperCLEAR: Crosslayer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores
- Eric Cheng
- Shahrzad Mirkhani
- et al.
- 2016
- DAC 2016
Conference paper