Tolerating soft errors in processor cores using CLEAR (cross-layer exploration for architecting resilience)Eric ChengShahrzad Mirkhaniet al.2018IEEE TCADIS
CLEAR: Crosslayer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor coresEric ChengShahrzad Mirkhaniet al.2016DAC 2016
Efficient soft error vulnerability estimation of complex designsShahrzad MirkhaniSubhasish Mitraet al.2015DATE 2015
Quantitative evaluation of soft error injection techniques for robust system dsesignHyungmin ChoShahrzad Mirkhaniet al.2013DAC 2013