On-chip wiring design challenges for gigahertz operation operation
- Alina Deutsch
- Paul W. Coteus
- et al.
- 2001
- Proceedings of the IEEE
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144 results for Daniel Edelstein
A high performance 0.13 μm copper BEOL technology with low-k dielectric
- R.D. Goldblatt
- B.N. Agarwala
- et al.
- 2000
- IITC 2000
Copper metallization for high performance silicon technology
- R. Rosenberg
- D. Edelstein
- et al.
- 2000
- Annual Review of Materials Science
On-chip wiring design challenges for GHz operation
- A. Deutsch
- H. Smith
- et al.
- 1999
- IEEE Topical Meeting EPEPS 1999
RF circuit design aspects of spiral inductors on silicon
- Joachim N. Burghartz
- D. Edelstein
- et al.
- 1998
- IEEE Journal of Solid-State Circuits
"Copper chip" technology
- D. Edelstein
- 1998
- Microelectronic Manufacturing 1998
Functional high-speed characterization and modeling of a six-layer copper wiring structure and performance comparison with aluminum on-chip interconnections
- A. Deutsch
- H. Harrer
- et al.
- 1998
- IEDM 1998
High-performance sub-0.25 μm CMOS technology with multiple thresholds and copper interconnects
- L. Su
- R. Schulz
- et al.
- 1998
- VLSI Technology 1998
Evaluation of Cu wiring in a production 64 Mb DRAM
- W. Cote
- G. Costrini
- et al.
- 1998
- VLSI Technology 1998
Copper dual damascene wiring for sub-0.25 μm CMOS technology
- J. Heidenreich
- D. Edelstein
- et al.
- 1998
- IITC 1998