High-performance sub-0.25 μm CMOS technology with multiple thresholds and copper interconnects
- L. Su
- R. Schulz
- et al.
- 1998
- VLSI Technology 1998
Publications
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143 results for Daniel Edelstein
Evaluation of Cu wiring in a production 64 Mb DRAM
- W. Cote
- G. Costrini
- et al.
- 1998
- VLSI Technology 1998
Spiral and solenoidal inductor structures on silicon using Cu-damascene interconnects
- D. Edelstein
- J.N. Burghartz
- 1998
- IITC 1998
Copper dual damascene wiring for sub-0.25 μm CMOS technology
- J. Heidenreich
- D. Edelstein
- et al.
- 1998
- IITC 1998
Copper ULSI interconnect technology
- D. Edelstein
- 1998
- MRS Spring 1998
Optical measurement of internal logic patterns in a flip-chip mounted silicon SRAM integrated circuit
- H. Heinrich
- N. Pakdaman
- et al.
- 1992
- LEOS 1992
3-D capacitance modeling of advanced multilayer interconnection technologies
- Daniel C. Edelstein
- 1990
- SPIE Advances in Intelligent Robotics Systems 1990
Sequential lateral solidification of silicon thin films on low-k dielectrics for low temperature integration
- Fabio Carta
- Stephen M. Gates
- et al.
- 2014
- Applied Physics Letters
Reliability and resistance projections for rhodium and iridium interconnects from first-principles
- Nicholas A. Lanzillo
- Daniel C. Edelstein
- 2022
- Journal of Vacuum Science and Technology B
Role of high aspect-ratio thin-film metal deposition in Cu back-end-of-line technology
- Andrew Simon
- O. Van Der Straten
- et al.
- 2020
- JVSTA