Chip-level integration: The new frontier for microprocessor architecture
- Jaime H. Moreno
- 2006
- SPAA 2006
Conference paper
Publications
21 results for Jaime Moreno
Design methodology for semi custom processor cores
- Victor Zyuban
- Anne-Marie Haen
- et al.
- 2004
- GLSVLSI 2004
Conference paperA new look at exploiting data parallelism in embedded systems
- Hillery C. Hunter
- Jaime H. Moreno
- 2003
- CASES 2003
Conference paperReducing Instruction Fetch Energy with Backwards Branch Control Information and Buffering
- Jude A. Rivers
- Sameh Asaad
- et al.
- 2003
- ISLPED 2003
Conference paperReducing instruction fetch energy with backwards branch control information and buffering
- J.A. Rivers
- S. Asaad
- et al.
- 2003
- ISLPED 2003
Conference paperA high-performance embedded DSP core with novel SIMD features
- Jeff H. Derby
- Jaime H. Moreno
- 2003
- ICASSP 2003
Conference paperAn innovative low-power high-performance programmable signal processor for digital communications
- Jaime H. Moreno
- Victor Zyuban
- et al.
- 2003
- IBM J. Res. Dev
ReviewEnvironment for powerPC microarchitecture exploration
- Mayan Moudgill
- John-David Wellman
- et al.
- 1999
- IEEE Micro
PaperValidation of Turandot, a fast processor model for microarchitecture exploration
- Mayan Moudgill
- Pradip Bose
- et al.
- 1999
- IEEE International Performance, Computing and Communications Conference, Proceedings 1999
Conference paperScalable instruction-level parallelism through tree-instructions
- J.H. Moreno
- Mayan Moudgill
- 1997
- ICS 1997
Conference paper