Bias Temperature Instability Reliability in Stacked Gate-All-Around Nanosheet Transistor
- Miaomiao Wang
- Jingyun Zhang
- et al.
- 2019
- IRPS 2019
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75 results for Huiming Bu
Leakage aware Si/SiGe CMOS FinFET for low power applications
- G. Tsutsui
- C. Durfee
- et al.
- 2018
- VLSI Technology 2018
SiGe FinFET for practical logic libraries by mitigating local layout effect
- G. Tsutsui
- Huimei Zhou
- et al.
- 2017
- VLSI Technology 2017
Stacked nanosheet gate-all-around transistor to enable scaling beyond FinFET
- N. Loubet
- T.B. Hook
- et al.
- 2017
- VLSI Technology 2017
FINFET technology featuring high mobility SiGe channel for 10nm and beyond
- Dechao Guo
- G. Karve
- et al.
- 2016
- VLSI Technology 2016
A novel ALD SiBCN low-k spacer for parasitic capacitance reduction in FinFETs
- Tenko Yamashita
- S. Mehta
- et al.
- 2015
- VLSI Technology 2015
Bottom oxidation through STI (BOTS) - A novel approach to fabricate dielectric isolated FinFETs on bulk substrates
- K. Cheng
- S.-C. Seo
- et al.
- 2014
- VLSI Technology 2014
Dielectric isolated FinFETs on bulk substrate
- Darsen Lu
- Kangguo Cheng
- et al.
- 2014
- S3S 2014
10nm FINFET technology for low power and high performance applications
- D. Guo
- H. Shang
- et al.
- 2014
- ICSICT 2014
Fin width scaling for improved short channel control and performance in aggressively scaled channel length SOI finFETs
- Abhijeet Paul
- Chun-Chen Yeh
- et al.
- 2013
- S3S 2013