ETSOI CMOS for system-on-chip applications featuring 22nm gate length, sub-100nm gate pitch, and 0.08μm2 SRAM cell
- Kangguo Cheng
- A. Khakifirooz
- et al.
- 2011
- VLSI Circuits 2011
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194 results for Vijay Narayanan
Full metal gate with borderless contact for 14 nm and beyond
- Soon-Cheon Seo
- L.F. Edge
- et al.
- 2011
- VLSI Technology 2011
Optimizing band-edge high-κ/metal gate n-MOSFETs with ALD lanthanum oxide cap layers-oxidant and positioning effects
- Robert D. Clark
- H. Jagannathan
- et al.
- 2010
- ECS Transactions
Oxygen transport in high-κ/ metal gate stacks and physical characterization by SIMS using isotope labeled oxygen
- Marinus Hopstaken
- John Bruley
- et al.
- 2010
- ECS Transactions
Methodology of ALD HfO2 high-κ gate dielectric optimization by cyclic depositions and anneals
- H. Jagannathan
- Robert D. Clark
- et al.
- 2010
- ECS Transactions
Ultimate EOT scaling (< 5Å) using Hf-based high-κ gate dielectrics and impact on carrier mobility
- Takashi Ando
- Martin M. Frank
- et al.
- 2010
- ECS Transactions
High-κ/metal gate low power bulk technology - Performance evaluation of standard CMOS logic circuits, microprocessor critical path replicas, and SRAM for 45nm and beyond
- D.-G. Park
- K. Stein
- et al.
- 2009
- VLSI-TSA 2009
pFET V t control with HfO 2/TiN/poly-Si gate stack using a lateral oxygenation process
- B. Cartier
- M. Steen
- et al.
- 2009
- VLSI Technology 2009
Extremely scaled gate-first high-k/metal gate stack with EOT of 0.55 nm using novel interfacial layer scavenging techniques for 22nm technology node and beyond
- K. Choi
- H. Jagannathan
- et al.
- 2009
- VLSI Technology 2009
Engineering band-edge high-κ/metal gate n-MOSFETs with cap layers containing group IIA and IIIB elements by atomic layer deposition
- H. Jagannathan
- L.F. Edge
- et al.
- 2009
- ECS Meeting 2009