A low power and high performance SOI SRAM circuit design with improved cell stability
- R.V. Joshi
- Y. Chan
- et al.
- 2006
- IEEE SOI 2006
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210 results for Rajiv V. Joshi
Statistical exploration of the dual supply voltage space of a 65nm PD/SOI CMOS SRAM cell
- Rajiv Joshi
- Rouwaida Kanj
- et al.
- 2006
- ESSDERC 2006
Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events
- Rouwaida Kanj
- Rajiv Joshi
- et al.
- 2006
- DAC 2006
A novel variation-aware low-power keeper architecture for wide fan-in dynamic gates
- Hamed F. Dadgour
- Rajiv V. Joshi
- et al.
- 2006
- DAC 2006
Technology impacts on sub-90nm CMOS circuit design & design methodologies
- Ruchir Puri
- Tanay Karnik
- et al.
- 2006
- VLSID 2006
Modeling and analysis of gate leakage in ultra-thin oxide sub-50nm double gate devices and circuits
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2005
- ISQED 2005
Assembly technology for three dimensional integrated circuits
- A. Topol
- D.C. La Tulipe
- et al.
- 2005
- VMIC 2005
A low-overhead virtual rail technique for SRAM leakage power reduction
- J.B. Kuang
- Hung Ngo
- et al.
- 2005
- ICCD 2005
A novel circuit topology for generating and validating digitally sense amplifier differentials for bulk and SOI
- Rajiv V. Joshi
- Yuen Chan
- 2005
- ESSCIRC 2005
Direct temperature measurement for VLSI circuits and 3-D modeling of self-heating in sub-0.13 μm SOI technologies
- R.V. Joshi
- S.S. Kang
- et al.
- 2005
- VLSID 2005