A high-performance, low leakage, and stable SRAM row-based back-gate biasing scheme in FinFET technology
- Rajiv V. Joshi
- Keunwoo Kim
- et al.
- 2007
- VLSID 2007
Publications
216 results for Rajiv V. Joshi
A Disturb Decoupled Column Select 8T SRAM Cell
- Vinod Ramadurai
- Rajiv Joshi
- et al.
- 2007
- CICC 2007
Gate leakage effects on yield and design considerations of PD/SOI SRAM designs
- Rouwaida Kanj
- Rajiv Joshi
- et al.
- 2007
- ISQED 2007
Estimation of gate-to-channel tunneling current in ultra-thin oxide sub-50 nm double gate devices
- Saibal Mukhopadhyay
- Keunwoo Kim
- et al.
- 2007
- Microelectronics Journal
Self-consistent and efficient electro-thermal analysis for poly/metal gate FinFETs
- Satish Kumar
- Rajiv V. Joshi
- et al.
- 2006
- IEDM 2006
The design and implementation of a low-overhead supply-gated SRAM
- J.B. Kuang
- Hung Ngo
- et al.
- 2006
- ESSCIRC 2006
A low power and high performance SOI SRAM circuit design with improved cell stability
- R.V. Joshi
- Y. Chan
- et al.
- 2006
- IEEE SOI 2006
Statistical exploration of the dual supply voltage space of a 65nm PD/SOI CMOS SRAM cell
- Rajiv Joshi
- Rouwaida Kanj
- et al.
- 2006
- ESSDERC 2006
Mixture importance sampling and its application to the analysis of SRAM designs in the presence of rare failure events
- Rouwaida Kanj
- Rajiv Joshi
- et al.
- 2006
- DAC 2006
A novel variation-aware low-power keeper architecture for wide fan-in dynamic gates
- Hamed F. Dadgour
- Rajiv V. Joshi
- et al.
- 2006
- DAC 2006