Strained Si CMOS (SS CMOS) technology: Opportunities and challenges
- K. Rim
- R. Anderson
- et al.
- 2003
- Solid-State Electronics
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48 results for R.A. Roy
Characteristics and device design of sub-100 nm strained Si N- and PMOSFETs
- K. Rim
- J.O. Chu
- et al.
- 2002
- VLSI Technology 2002
A self-aligned silicide process utilizing ion implants for reduced silicon consumption and control of the silicide formation temperature
- G.M. Cohen
- C. Cabral Jr.
- et al.
- 2002
- MRS Proceedings 2002
A self-aligned silicide process for thin silicon-on-insulator MOSFETs and bulk MOSFETs with shallow junctions
- G.M. Cohen
- C. Cabral Jr.
- et al.
- 2001
- MRS Proceedings 2001
New polysilicon disposable sidewall process for sub-50 nm CMOS
- K.L. Lee
- D. Boyd
- et al.
- 2001
- ESSDERC 2001
High performance of planar double gate MOSFETs with thin backgate dielectrics
- E.C. Jones
- M. Ieong
- et al.
- 2001
- DRC 2001
Pulsed laser deposition of high-epsilon dielectrics: PMN and PMN-PT
- K.L. Saenger
- R.A. Roy
- et al.
- 1992
- MRS Proceedings 1992
Electromechanical conversion efficiency of PZT films
- K.F. Etzold
- R.A. Roy
- et al.
- 1990
- IUS 1990
Low energy ion beam assisted grain size evolution in thin film deposition
- Krishna Rajan
- R.A. Roy
- et al.
- 1997
- Journal of Electronic Materials
Crystallographic texture of C54 titanium disilicide as a function of deep submicron structure geometry
- V. Svilan
- K.P. Rodbell
- et al.
- 1997
- Journal of Electronic Materials