Publications

3 results for P.W. Epperlein

Josephson 4 K-bit cache memory design for a prototype signal processor. I. General overview
- - W.H. Henkels
  - L.M. Geppert
  - et al.
- 1985
- Journal of Applied Physics
Josephson 4 K-bit cache memory design for a prototype signal processor. III. Decoding, sensing, and timing
- - W.H. Henkels
  - L.M. Geppert
  - et al.
- 1985
- Journal of Applied Physics
Josephson 4 K-bit cache memory design for a prototype signal processor. II. Cell array and drivers
- - W.H. Henkels
  - L.M. Geppert
  - et al.
- 1985
- Journal of Applied Physics