Rajiv Ramaswami, Kumar N. Sivarajan
IEEE/ACM Transactions on Networking
Inteirconnecction of components in a VLSI chip is becoming an increasingly complex problem. In this paper we examine the complexity of the wire routing process and discuss several new approaches to solving the problem using a parallel system architecture. The ma-chines discussed range from compact systems for highly specialized applications to more general designs suited for broader applications. The process speedup due to parallelism and the cost advantage due to the use of large numbers of identical VLSI parts make these new machines practical today. Copyright © 1983 by The Institute of Electrical and Electronics Engineers, Inc.
Rajiv Ramaswami, Kumar N. Sivarajan
IEEE/ACM Transactions on Networking
Kaoutar El Maghraoui, Gokul Kandiraju, et al.
WOSP/SIPEW 2010
Zohar Feldman, Avishai Mandelbaum
WSC 2010
György E. Révész
Theoretical Computer Science