Xiaozhu Kang, Hui Zhang, et al.
ICWS 2008
We consider the problem of implementing a wait-free regular register from storage components prone to Byzantine faults. We present a simple, efficient, and self-contained construction of such a register. Our construction utilizes a novel building block, called a 1-regular register, which can be efficiently implemented from Byzantine fault-prone components. © 2006 Elsevier B.V. All rights reserved.
Xiaozhu Kang, Hui Zhang, et al.
ICWS 2008
Hendrik F. Hamann
InterPACK 2013
Michael D. Moffitt
ICCAD 2009
Rolf Clauberg
IBM J. Res. Dev