Conference paper
MIMO link design strategy for wireless data center applications
Yasunao Katayama, Toshiyuki Yamane, et al.
WCNC 2012
Despite their great market success, DRAMs have not kept pace with microprocessor improvements, so researchers are looking to advanced high-speed DRAM and merged DRAM/logic technologies to increase memory system performance.
Yasunao Katayama, Toshiyuki Yamane, et al.
WCNC 2012
Yasunao Katayama, Yasushi Negishi, et al.
IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Yasuteru Kohda, Nobuyuki Ohba, et al.
ICME 2011
Yasunao Katayama, Toshiyuki Yamane, et al.
NANOARCH 2015