TCAD-Based Variability Analysis of Cylindrical NVDRAM and VNAND Architectures with 3D Multi-Granular Polycrystalline Ferroelectric–Dielectric Phases

We found 1.) The inclusion of a DE-phase leads to a reduction in overall polarization of FE-layer 2.) Larger Voronoi FE grain-sizes decrease variability (low-σ/µ) 3.) The presence of a DE-phase induces variability in NVDRAM, causing a decrease in bitline-potential-margin between read-‘1’ and read-‘0’. 4.) Despite DE-phase introduction, NVDRAM retains a superior bitline-potential difference compared to conventional-DRAM, 5.) The effect of DE-phase on the memory-window characteristics (low and $high-V{_TH})$ of vertical-NAND FeFETs is also analyzed.