Study of the memory reference behavior of engineering/scientific applications in parallel processors

Results are presented of a study of the memory reference behavior of several engineering/scientific applications executing on a 64-processor, shared-memory, parallel-processor system based on a multistage interconnection network. Architectural details were abstracted to study the reference behavior inherent in the applications. A trace-driven simulation model was used to obtain dynamic reference characteristics of the code. Included in this code were explicit declarations of shared variables. The results show that the majority of the references to this shared data are read-only lines. Furthermore, accesses to read-write lines are owned by a single processor for an extended period of time.