Arnab Neelim Mazumder, Jian Meng, et al.
IEEE JESTCS
This paper proposes convergence enhancement to state-space averaging (SSA) methodology for steady-state and small-signal analysis of high-ratio hybrid DC-DC converters, first using analysis of Double-Step-Down (DSD) topology, including parasitics, as an example, then extending to other hybrid topologies with different numbers of capacitors and inductors. The enhanced SSA method can be used to: 1) derive small-signal control-to-output transfer functions, which is essential to optimize the compensator for fast and stable closed-loop operation; 2) calculate steady-state inductor currents, output voltage, input current and the voltage(s) across the flying capacitor(s), VCFs, which is important to determine steady-state characteristics and performance; 3) include circuit non-idealities such as parasitics and timing mismatches; and 4) evaluate VCF balancing property by the proposed matrix invertibility principle and added constants, and determine whether dedicated VCF balancing circuits can be eliminated, which is considered an important benefit with reduced complexity and improved reliability. The theoretical results of DSD are then plotted in MATLAB and verified in simulations using PSIM and Cadence periodic transfer function (PXF) analysis, and measurement results using GaN devices. The simulation and measurement results match well with theoretical analysis. The enhancement is then extended beyond the DSD topology to analyze emerging hybrid topologies with more switched inductors and capacitors, future-proofing its capability to be applicable to new hybrid topologies.
Arnab Neelim Mazumder, Jian Meng, et al.
IEEE JESTCS
Matthew M. Ziegler, Krishnan Kailas, et al.
IEEE JESTCS
Si Yuan Sim, Xin Zhang, et al.
APEC 2024
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IEDM 2014