Liat Ein-Dor, Y. Goldschmidt, et al.
IBM J. Res. Dev
A general theory for characterizing and then realizing algorithms in hardware is given. The physical process of computation is interpreted in terms of a graph in physical space and time, and then an embedding into this graph of another graph which characterizes data flow in particular algorithms is given. The types of the special class of computational structures called systolic arrays which can occur physically are completely described, and a technique is developed for mapping the graph of a particular systolic algorithm into a physical array. Examples illustrate the methodology. © 1984 Springer-Verlag.
Liat Ein-Dor, Y. Goldschmidt, et al.
IBM J. Res. Dev
Oliver Bodemer
IBM J. Res. Dev
Khaled A.S. Abdel-Ghaffar
IEEE Trans. Inf. Theory
Raghu Krishnapuram, Krishna Kummamuru
IFSA 2003